Deep silicon etching is important for 3D integrated circuit (3D-IC) design, micro-electronic machine systems (MEMS), and power device manufacturing. For 3D-IC, multi-dies (devices) will be stacked vertically to realize the “minimum size” of device. Deep etching aims to create the hole/via followed by filling conductive metal to realize communication between stacks (also called Through Silicon Via). For MEMS, different kinds of sensors have different structures with high aspect ratios. Power devices, such as super junction diodes, also need deep trench etching.
Deep reactive ion etching (DRIE) is used to form such high aspect ratio structures (normally >15:1 will be required for future technologies). The industry has adopted the switchable Bosch process, which cyclically supplies an etching gas (SF6) followed by a sidewall passivation gas (cC4F8) (see, e.g., U.S. Pat. Nos. 5,501,893, 6,531,068, and 6,284,148). This process provides high selectivity and high etch rates. However, a non-uniform etching rate is observed between structures having different aspect ratios (also called RIE lag or aspect ratio dependent etching) due to the physical difficulty the ions/species have reaching the bottom of high aspect ratio holes/vias utilized in future technologies such as 3D-IC and MEMS. JVST A 24, 1283, 2006. The smaller size opening also makes deep etching more difficult. Owen et al., IEEE MEMS 2012. In other words, the higher aspect ratio and the narrower the hole, the slower etch rate using the Bosch process. Another disadvantage of Bosch process is that the polymer residue is difficult to remove after etching. Journal of the Korean Physical Society, 49 (2006) 1991-1997.
In current industry applications, especially MEMS, etch stop layers may be provided at the bottom of a silicon layer to physically reach same etch depth for different opening sizes. JVST A 24, 1283, 2006.
Another solution tunes the etching parameters. WO 2009/036053 to LAM Research Corp discloses changing substrate bias in the Bosch process as a solution of RIE lag. WO2009/036053 also replaces SF6 in the Bosch process with NF3 or CHF3 and cC4F8 with CF4.
US2013/105947 to Fuller et al. discloses a hydrofluorocarbon gas employed as a polymer deposition gas in an anisotropic etch process which alternates between use of an etchant gas and the polymer deposition gas to etch a deep trench in a semiconductor substrate.
WO2014/070838, having the same assignee as the present application, discloses etching fluids for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers on a substrate.
WO2014/160910 to DuPont discloses hydrofluorolefin compositions useful for removing surface deposits in CVD chambers.
WO2015/035381, having the same assignee as the present application, discloses sulfur-containing compounds for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers and mask material.
U.S. Pat. No. 6,569,774 to Trapp (Micron) discloses a plasma etch process for forming a high aspect ratio contact opening through a silicon oxide layer using CxHyFz etch gases, wherein x is 1 to 2, y is 0 to 3, and z is 2x−y+2 or x is 3 to 6, y is 0 to 3, and z is 2x−y.
WO2010/100254 to Solvay Fluor GmbH discloses use of certain hydrofluoroalkenes for a variety of processes, including as an etching fluid for semiconductor etching or chamber cleaning. The hydrofluoroalkenes may include a mixture of at least one compound selected from each of the following groups a) and b):
a) (Z)-1,1,1,3-tetrafluorobut-2-ene, (E)-1,1,1,3-tetrafluorobut-2-ene, or 2,4,4,4-tetrafluorobut-1-ene, and
b) 1,1,1,4,4,4-hexafluorobut-2-ene, 1,1,2,3,4,4-hexafluorobut-2-ene, 1,1,1,3,4,4-hexafluorobut-2-ene, and 1,1,1,2,4,4-hexafluorobut-2-ene.
A need remains for Bosch-type etching processes to form high aspect ratio apertures.
<Notation and Nomenclature >
Certain abbreviations, symbols, and terms are used throughout the following description and claims, and include:
As used herein, the indefinite article “a” or “an” means one or more.
As used herein, the terms “approximately” or “about” mean ±10% of the value stated.
As used herein, the term “etch” or “etching” refers to a plasma etch process (i.e., a dry etch process) in which ion bombardment accelerates the chemical reaction in the vertical direction so that vertical sidewalls are formed along the edges of the masked features at right angles to the substrate (Manos and Flamm, Plasma Etching An Introduction, Academic Press, Inc. 1989 pp.12-13). The etching process produces apertures, such as vias, trenches, channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in the substrate. The aperture has an aspect ratio defined as the ratio of the height to width (a 20:1 aspect ratio has a 20x height and a 1x width, wherein x≧1, preferably 1≦x≦5 (see FIG. 5)).
The term “pattern etch” or “patterned etch” refers to etching a non-planar structure, for example by placing a patterned mask layer on a stack of metal- and/or silicon-containing layers and etching vias or trenches or the like in the areas not covered by the mask. The term “mask” refers to the layer that resists etching. The mask layer may be located above or below (the etch stop layer) the layer to be etched. The mask layer may be a hardmask, such as TiN or TaN, or a soft mask, such as a polymer or other organic “soft” resist materials. A “sacrificial mask” material is a material that is used to pattern a substrate and then removed.
The term “selectivity” means the ratio of the etch rate of one material to the etch rate of another material. The term “selective etch” or “selectively etch” means to etch one material more than another material, or in other words to have a greater or less than 1:1 etch selectivity between two materials.
As used herein, “—C”, “═C” and “>C” refers to how that C is bonded to the remaining structure, with “—”being a single bond, “═” being a double bond, and “>” being a ring structure. For example, “>CHF” may refer to cC4H5F3, wherein at least one C of the C4 cyclic structure has a H and F substituent.
The standard abbreviations of the elements from the periodic table of elements are used herein. It should be understood that elements may be referred to by these abbreviations (e.g., S refers to sulfur, Si refers to silicon, H refers to hydrogen, etc.).
Please note that the Si-containing films, such as SiN and SiO, are listed throughout the specification and claims without reference to their proper stoichioimetry. The silicon-containing layers may include pure silicon (Si) layers, such as crystalline Si, polysilicon (polySi or polycrystalline Si), or amorphous silicon; silicon carbide (SioCp) layers; silicon nitride (SikNl) layers; silicon oxide (SinOm) layers; or mixtures thereof, wherein k, l, m, n, o, and p inclusively range from 1 to 6. Preferably, silicon nitride is SikNl, where k and l each range from 0.5 to 1.5. More preferably silicon nitride is Si1N1. Preferably silicon oxide is SinOm, where n ranges from 0.5 to 1.5 and m ranges from 1.5 to 3.5. More preferably, silicon oxide is SiO2 or SiO3. The silicon-containing layer may be silicon. Alternatively, the silicon-containing layer may be a silicon oxide based dielectric material such as organic based or silicon oxide based low-k dielectric materials such as the Black Diamond II or III material by Applied Materials, Inc. The silicon-containing layers may also include dopants, such as B, C, P, As and/or Ge.